ml670100 Oki Semiconductor, ml670100 Datasheet - Page 141

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

Table 9.3 gives the pin output levels after a system reset and between transfers - that is, between
the completion of one 8-bit transfer operation and the request for another.
In slave mode, the serial port ignores any clock pulses beyond the eighth.
Writing "0" to the BUSY bit while a transfer is underway aborts the transfer and initializes
Clock Synchronous Serial Interface n (CSIn, n=0,1) by clearing the SFTCT field in CSI Status
Register n (CSInST, n=0,1) to 000b. This function helps cope with loss of synchronization
clock signal and other synchronization problems. Loss of synchronization clock signal leaves a
nonzero value in the SFTCT field and a "1" in the BUSY bit.
The program can therefore monitor the BUSY bit with a timer or some other means and abort
by forcing it to "0" if it remains at "1" beyond a certain interval.
Always wait for the current transfer operation to terminate before modifying the contents of the
CSI Shift Register (CSInSFT, n=0,1). Modification in the middle of an operation destroys both
incoming and outgoing data.
Table 9.3 : Output Pin States
Pin
CSIn_SCLK
CSIn_TXD
After a system reset
"H" level
"L" level
Between transfers
"H" level
Most significant bit (MSB) of last data transmitted
9-9