ml670100 Oki Semiconductor, ml670100 Datasheet - Page 123

no-image

ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
8.2.5
The ASI Test Control Register (ASTSCON) is an 8-bit read/write register that simplifies the
testing of asynchronous serial interface internals by looping the ASI channel's transmit output
signal back to the receive input signal.
After a system reset, this register contains 0x00. Leave it at this setting for normal operation.
Bit Descriptions
LBTST
This bit controls the looping of the ASI channel's transmit output signal back to the receive
input signal. Setting it to "1" sends the transmit output signal to both the output pin and the
receive input circuit. Resetting it to "0" causes the transmit and receive functions to operate
independently. The transmit output signal is not looped back to the receive input signal.
MPERR
This bit is for generating a parity error. Setting this bit to "1" during loop back testing forces a
parity error in the receive signal.
MFERR
This bit is for generating a framing error. Setting this bit to "1" during loop back testing forces
a framing error in the receive signal.
ASI Test Control Register (ASTSCON)
LBTST
7
6
0
Figure 8.6 : ASI Test Control Register (ASTSCON)
A "0" indicates a reserved bit. Always write "0" to it.
Writing "1" produces unreliable operation.
5
0
4
0
3
0
2
0
MPERR
1
MFERR
0
0 Forced framing error: no error
1 Forced framing error: error
0 Forced parity error: no error
1 Forced parity error: error
0 Loop back test: disabled
1 Loop back test: enabled
8-9

Related parts for ml670100