ml670100 Oki Semiconductor, ml670100 Datasheet - Page 185

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
11.3.3.3.2 RAS-to-CAS Delay
The RAS-to-CAS Delay (RCD) bit in the DRAM Bank 2 and 3 Access Timing Control
Registers (ATnCON, n=2,3) adjusts the t
nRAS and nCAS signals, for bank n to 1 or 2 clock cycles to match the system clock (SYSCLK)
frequency and the type of DRAM used.
Figure 11.23 gives the timings for both selections.
SYSCLK
(CLKOUT)
XA15 - XA0
nRAS
nCAS
XD15 - XD0
Figure 11.23 : RAS-to-CAS Delay Timing
Row
Read cycle
One cycle
Col
Read
RCD
, the RAS-to-CAS delay between assertion of the
Two cycles
Row
Read cycle
Col
Read
11-29

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