ml670100 Oki Semiconductor, ml670100 Datasheet - Page 191
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ml670100
Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
1.ML670100.pdf
(204 pages)
- Current page: 191 of 204
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11.3.3.6.2 Self-Refresh Functions
SYSCLK
(CLKOUT)
RSR bit
in RFCON
nRAS0
nRAS1
nCAS
These functions are for use with self-refreshing DRAM devices, which switch to self-refresh
mode when the controller accesses them with CAS-before-RAS access and then asserts the
nRAS and nCAS signals for longer than the specified interval. (See Figure 11.30.)
When switching back from self-refresh mode, the controller negates the nRAS signal and waits
(1) the number of clock cycles specified by the CAS Hold Self-refresh (CHS) field in the
Refresh Timing Control Register (RTCON) before negating the nCAS signal and
(2) the number of clock cycles specified by the RAS Precharge Self-refresh (RPS) field in
RTCON before asserting the nRAS signal. Set these two fields to match the DRAM type.
The Self-Refresh (RSR) bit in the Refresh Control Register (RFCON) controls this function.
Setting this bit to "1" causes completion of the current access to assert first the nCAS signal
and then the nRAS signal long enough to activate DRAM self-refresh operation. Subsequent
access to a DRAM bank (2 or 3) resets this bit to "0" and automatically switches back from
self-refresh mode to normal operation mode. Writing "0" to this bit forces a return as well.
When switching back from self-refresh mode, the controller negates the nRAS signal, first
waits the number of clock cycles specified by the CAS Hold Self-refresh (CHS) field in the
Refresh Timing Control Register (RTCON) before negating the nCAS signal, and then waits
the number of clock cycles specified by the RAS Precharge Self-refresh (RPS) field in RTCON
before asserting the nRAS signal.
Figure 11.30 : Self-Refresh Timing
Fixed at one cycle
CHS=2’b10
RPS=3’b100
11-35
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