ml670100 Oki Semiconductor, ml670100 Datasheet - Page 167
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ml670100
Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
1.ML670100.pdf
(204 pages)
- Current page: 167 of 204
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11.2.3
The Off Time Control Register (OTCON) is an 8-bit read/write register that specifies the
number of system clock (SYSCLK) cycles ("off time") inserted when changing banks or
changing from read access to write access within the same bank. Such pauses prevent bus
collisions for output data from external memory and peripheral devices.
After a system reset, this register contains 0xFF.
Bit Descriptions
OTCNn (n=0-3)
The OTCNn (n=0-3) field specifies the number of system clock (SYSCLK) cycles ("off time")
inserted when changing from bank n to another bank or changing from read access to write
access within bank n. Such pauses prevent bus collisions for output data from external memory
and peripheral devices. The range is from 0 (no pausing) to 3.
When switching from bank 0 to bank 2, for example, the External Memory Controller (XMC)
uses the number from OTCN0.
Off Time Control Register (OTCON)
7
OTCN3
6
Figure 11.5 : Off Time Control Register (OTCON)
5
OTCN2
4
3
OTCN1
2
1
OTCN0
OTCNn
(n=0-3)
00
01
10
11
0
“Off time” for bank n
0 cycles
1 cycle
2 cycles
3 cycles
11-11
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