ml670100 Oki Semiconductor, ml670100 Datasheet - Page 142

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

9.4
9.4.1
9-10
Figure 9.7 gives the I/O signal timing for master mode. The serial port feeds the
synchronization clock signal to the CSIn_SCLK (n=0,1) pin, shifts the transmit data to the
CSIn_TXD (n=0,1) pin, and samples the incoming data at the CSIn_RXD (n=0,1) pin. It
synchronizes synchronization clock transitions between "H" level and "L" level with the rising
edges of the system clock (SYSCLK) signal. It transmits outgoing bits at the falling edges of
the synchronization clock signal and samples the input at the rising edge of the synchronization
clock signal.
If the synchronization clock signal is the overflow signal from Flexible Timer (FTM) channel n
(n=0,1), the latter must have a period at least four times that of the system clock (SYSCLK)
period.
I/O Signal Timing
Master Mode I/O Signal Timing
SYSCLK
(CLKOUT)
CSIn_TXD
CSIn_RXD
CSIn_SCLK
Figure 9.7 : Master Mode I/O Signal Timing
Sampling