ml670100 Oki Semiconductor, ml670100 Datasheet - Page 29

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

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Instructions are either 32 bits long (in ARM state) or 16 bit long (in THUMB state).
The CPU supports byte (8-bit), halfword (16-bit) and word (32-bit) data types.
The CPU has a total of 34 registers -29 general-purpose 32-bit registers and five status
Instruction Length
Data Types
Words must be aligned to four-byte boundaries and half words to two-byte boundaries.
Operating Modes
The CPU supports six modes of operation:
User (usr):
FIQ(fiq):
IRQ(irq):
Supervisor (sys):
System (sys):
Undefined(und):
Note :
Mode changes may be made under software control, or may be brought about by interrupts or
exception processing. Most application programs will execute in User mode.
The non-user modes -known as privileged modes- are entered in order to service interrupts or
exceptions, or to access protected resources.
Registers
registers- but these cannot all be seen at once. The CPU state and operating mode dictate
which registers are available to the programmer.
Note :
The core architecture offers an additional mode, Abort mode, but this LSI does
not use it.
The core architecture offers an additional two general-purpose registers and one
status register for use with the Abort mode, which this LSI does not support.
The normal ARM program execution state
Designed to support a data transfer or channel process
Used for general-purpose interrupt handling
Protected mode for the operating system.
A privileged user mode for the operating system
Entered when an undefined instruction is executed
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