ml670100 Oki Semiconductor, ml670100 Datasheet - Page 182

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
11.3.2.3 Half Word Access
11-26
SYSCLK
(CLKOUT)
XA23 - XA1
nCS0
XD15 - XD0
nWRH
nWRL
nHB
nLB
nWRE
Two access methods are available for 16-bit bus access to the SRAM banks (0 and 1): with one
Write Enable signal and two Byte Select signals (nWRE , nHB and nLB) or with two Write
Enable signals and one Byte Select signal (nWRH and nWRL). The corresponding Byte Access
Specification n (BASn, n=0,1) bit in the Bus Access Control Register (BACON) switches the
nWRE/nWRL, nHB/nWRH, and nLB/XA0 pins between the two different configurations. The
two banks must use the same access methods.
Figure 11.20 shows write cycles for both access methods.
Figure 11.20 : Half Word Access Timing for SRAM Banks (0 and 1)
Upper byte
Write
Write
Lower byte
Write
Write
Two Write Enable
signals
Two Byte
Select signals

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