ml670100 Oki Semiconductor, ml670100 Datasheet - Page 60

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

4.3.6
4.3.7
4-12
The Interrupt Request Registers 0 to 3 (IRRn, n=0 - 3) are 8-bit read/write registers containing
numbered flags tracking external and internal interrupt requests.
After a system reset, they contain 0x00.
For the mapping between interrupt sources and IRRn bits, refer back to Table 4.3.
Writing "1" to a bit resets it to "0." Writing "0" produces no change.
The bits in the Interrupt Request Registers 0 to 3 (IRRn, n=0 - 3) are flags indicating whether
there has been an interrupt request from the corresponding source. A "1" indicates that one or
more interrupt requests have been received; a "0," that none have been received.
The Interrupt Level Control Registers 0 to 15 (ILCONn, n=0 - 15) are 8-bit read/write registers
specifying the interrupt levels for the individual interrupt sources.
After a system reset, they contain 0x00.
Figure 4.8 gives the locations of the interrupt level fields (ILRn, n=0 - 31) specified for the
individual interrupt sources in Table 4.3. Setting the interrupt level to 0 masks interrupt
requests from the corresponding interrupt source. Setting it to 1 enables them with the lowest
priority. Higher levels represent higher priorities. Level 7 has the highest priority.
Interrupt Request Registers 0 to 3 (IRRn, n=0 - 3)
Bit Descriptions
Interrupt Level Control Registers 0 to 15 (ILCONn, n=0 - 15)
IRR0
IRR1
IRR2
IRR3
Figure 4.7 : Interrupt Request Registers 0 to 3 (IRRn, n=0 - 3)
7
0
0
A "0" indicates a reserved bit. Always write "0" to it.
Writing "1" produces unreliable operation.
6
0
0
5
4
3
2
1
0
0