ml670100 Oki Semiconductor, ml670100 Datasheet - Page 47

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
3.4
The basic clock signal is either the oscillation clock from the oscillator circuit or an external
clock signal.
Clock Signals
Table 3.3 : Clock Sources
If the PLLEN input enables PLL operation, specify the frequency multiplier from Table 3.4
matching the frequency range for the basic clock signal from the oscillator circuit or an
external clock signal.
Table 3.4 : FSEL Pin Settings
The frequency for the system clock (SYSCLK) signal, the clock for CPU and on-chip
peripherals, is determined by the CKM field in the Clock Control Register (CKCON). The
frequency of SYSCLK is limited to the range of 4 to 25MHz.
The LSI permits adjusting this setting
processing load.
Table 3.5 : System Clock (SYSCLK) Frequencies
External source
Crystal oscillator
4-6.25MHz
8-12.5MHz
00
01
1X
Clock source
Basic clock frequency
from the oscillator
circuit or an external
clock signal
CKM
Clock input
Connect crystal oscillator
"H" level
(Connect to V
"L" level
(Connect to ground.)
OSC0
FSEL Input
Frequency 1/4 that of PLL output
Frequency 1/2 that of PLL output
Frequency 1/1 that of PLL output
System clock (SYSCLK) frequency
DD
-
.)
and thus the operating clock frequency
Open
OSC1
x 4
x 2
Multiplier
X : don’t care
16-25MHz
PLL Output Clock
Frequency
-
to match the
3-7

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