ml670100 Oki Semiconductor, ml670100 Datasheet - Page 198

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

11.6
11.6.1
11-42
Figure 11.36 shows sample configurations for external ROMs connected to memory bank 0.
Both ground the nEA pin to specify execution from the external ROM.
If the ROM has a data width of 8 bits, ground the DBSEL pin to configure this LSI's external
data bus for that width and connect the ROM's address inputs A0, A1, A2,... to the external
address pins with the same numbers (XA0, XA1, XA2,...).
If the ROM has a data width of 16 bits, connect the DBSEL pin to V DD to configure this LSI's
external data bus for that width and connect the ROM's address inputs A0, A1, A2,... to the
external address pins offset by 1 (XA1, XA2, XA3,...) and leave XA0 unused.
After the system reset, this LSI then executes code starting from address 0x00000000 in the
external ROM.
Connecting the nEA pin to VDD, however, configures the LSI to execute code from the
internal ROM located at addresses 0x00000000 to 0x001FFFFF. Only accesses to addresses
between 0x00800000 and 0x00FFFFFF assert nCS0 and generate external bus cycles.
Altering the sample configurations in Figure 11.36 to connect the nEA pin to V DD , therefore,
causes the LSI to read from the external ROM for addresses between 0x00800000 and
0x00FFFFFF.
Connecting External Memory
Connecting ROM