ml670100 Oki Semiconductor, ml670100 Datasheet - Page 48

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

3.5
3-8
Writing "1" to the HLT bit in the Standby Control Register (SBYCON) switches this LSI to
HALT mode. This mode suspends operation of the CPU but the peripheral circuits remain
operational.
The LSI remains in HALT mode until one of the following conditions is met:
Masking an interrupt request, whether external or internal, by setting its interrupt level to 0
prevents it from terminating HALT mode. If the level is 1 or higher, however, the interrupt
request always terminates HALT mode even if that level is lower than the current interrupt
level, preventing the interrupt request from reaching the CPU itself.
An external fast interrupt request (FIQ) does not terminate HALT mode if such interrupt
requests are masked by the EFIQM bit in the External FIQ Control Register (EFIQCON). If
masking is off, the interrupt request terminates HALT mode.
Standby Mode
• There is an external fast interrupt request (FIQ) and such requests are not masked.
• There is an external interrupt request and such requests are not masked.
• There is an internal interrupt request and such requests are not masked.
• An external reset signal (nRST) or Watchdog Timer (WDT) counter overflow signal
• I/O port 8 is configured for its secondary function, and DBGRQ (PIO8[1]) is asserted.
(WDTOV) produces a system reset.