ml670100 Oki Semiconductor, ml670100 Datasheet - Page 37

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
2.9.4
2.9.5
The FIQ (Fast Interrupt Request) exception is designed to support a data transfer or channel
process, and in ARM state has sufficient private registers to remove the need for register saving
(thus minimizing the overhead of context switching).
Irrespective of whether the exception was entered from ARM or Thumb state, a FIQ handler
The IRQ (Interrupt Request) exception is a normal interrupt. IRQ has a lower priority than FIQ
and is masked out when a FIQ sequence is entered. It may be disabled at any time by setting the
I bit in the CPSR, though this can only be done from a privileged (non-User) mode.
Irrespective of whether the exception was entered from ARM or Thumb state, an IRQ handler
should return from the interrupt by executing.
Table 2.2 : Exception entry/exit
Note :
FIQ
should leave the interrupt by executing
FIQ may be disabled by setting the CPSR's F flag (but note that this is not possible from User
mode).
IRQ
1
2
3
RESET
UDEF
SWI
IRQ
FIQ
BL
Where PC is the address of the BL/SWI/Undefined Instruction.
Where PC is the address of the instruction which did not get executed since the FIQ or
IRQ took priority.
The value saved in R14_svc upon reset is unpredictable.
SUBS PC, R14_fig, #4
SUBS PC, R14_irq, #4
SUBS PC, R14_fiq, #4
SUBS PC, R14_irq, #4
MOVS PC, R14_und
MOVS PC, R14_svc
Return Instruction
MOV PC, R14
NA
R14_x
PC + 4
PC + 4
PC + 4
PC + 4
PC + 4
ARM
-
Previous
State
THUMB
R14_x
PC + 2
PC + 2
PC + 2
PC + 4
PC + 4
-
Notes
1
1
1
2
2
3
2-11

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