ml670100 Oki Semiconductor, ml670100 Datasheet - Page 192

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

11.3.4
11.3.4.1 Off Time Control
11-36
External Access Functions Common to All Banks
This LSI divides addresses in its external memory areas into four banks. Because of the
different data output hold times for the devices in these banks, the following access sequences
can lead to collisions on the external data bus (XD15 to XD0).
The Off Time Control Register (OTCON) provides a means of preventing such collisions by
inserting system clock (SYSCLK) cycles ("off time") between such accesses. Specify the
number, 0 to 3, in the OTCNn (n=0-3) field for the bank.
Figure 11.31 and 11.32 show two examples of access timing with "off time."
- Read access to one bank immediately followed by read access to another bank
- Read access to one bank immediately followed by write access to another bank or the
SYSCLK
(CLKOUT)
nCS0
nCS1
XA23 - XA0
nRD
XD15 - XD0
same bank
Figure 11.31 : Access Timing with Off Time (a)
Read from ROM
in banl 0
ROM Read
ROM Data
Off time
ROM data hold
RAM Read
Read from RAM
in banl 1
RAM Data