ml670100 Oki Semiconductor, ml670100 Datasheet - Page 79

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
5.3
5.3.1
5.3.2
5.3.3
A system reset triggered by the external reset signal (nRST) initializes PIOn pin functions to
the following configurations:
A system reset triggered by the Watchdog Timer (WDT) counter overflow signal (WDTOV)
does not affect pin functions. They remain as they were before the reset.
The meanings of the bits obtained by reading the Port Input Register n (PIn, n=0 - 8) depend on
the configurations of the corresponding pins as shown in Table 5.3.
If an I/O port n (PIOn, n=0 - 8) pin is configured for I/O port output (not secondary), its output
level reflects the corresponding bit in Port Output Register n (POn, n=0 - 8). If it is configured
for its secondary function, the output is the output from the corresponding on-chip peripheral.
I/O Port Operation
Configuration after System Reset
Reading from I/O Ports
Table 5.3 : Reading from I/O Ports
Note :
Writing to I/O Ports
Function
Primary
Secondary
PIO2[7] and PIO3 to PIO7 have their primary pin functions (I/O) and are configured for
input.
All other I/O port 2 pins (PIO2[6:0]) have their secondary functions.
PIO0, PIO1, and PIO8 have the functions determined by the input levels during the reset at
the nEA , DBSEL, and TEST pins, respectively.
1.
2.
Here, the PIn bit is equal to the corresponding POn bit because the latter
controls the output level.
Here, PIO0 to PIO2 return indeterminate values.
Direction
Input
Output
Input
Output
Value returned
Input level at the pin
Output level at the pin (See Note 1.)
Input level at the pin (See Note 2.)
Output level at the pin
5-9

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