ml670100 Oki Semiconductor, ml670100 Datasheet - Page 76

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
5.2.3
5.2.4
5-6
Port Mode Register n (PMn, n=0 - 8) is an 8-bit read/write register that specifies the I/O
directions for I/O port PIOn pins.
These settings apply only to the primary function, I/O ports.
A system reset triggered by the external reset signal (nRST) clears all these registers to 0x00.
The bits in Port Mode Register n (n=0 - 8) control the I/O directions of the corresponding pins
in I/O port n. Setting a bit to "1" configures the pin for output; resetting it to "0," for input.
Port Function Selection Register n (PFSn, n=0 - 5, 7) is an 8-bit read/write register containing
control bits for activating secondary functions for the corresponding PIOn pins.
Port Mode Registers 0 to 8 (PMn, n=0 - 8)
Bit Descriptions
Port Function Selection Registers 0 to 5, 7(PFSn, n=0 - 5, 7)
(1) Port Function Selection Register 0 (PFS0)
Port Function Selection Register 0 (PSF0) activates PIO0 pin secondary (XA pin) functions at
the bit level. After a system reset triggered by the external reset signal (nRST) , each bit has a
value that depends on the nEA input level during the reset. "L" level input sets them to "1"
(PSF0 = 0xFF), and the PIO0 pins function as external address bus pins XA23 to XA16; "H"
level input sets them to "0" (PSF0 = 0x00), and the pins function as an I/O port.
In the former case, the program can restrict the number of pins used for the external address
bus XA by setting this register to the proper masking value for specifying the number of bits in
the address.
XA16 only
XA17 and XA16
::
XA23 to XA16
Figure 5.3 : Port Mode Registers 0 to 8 (PMn, n=0 - 8)
Figure 5.4 : Port Function Selection Register 0 (PFS0)
7
7
PSF0 = 8'b0000_0001
PSF0 = 8'b0000_0011
PSF0 = 8'b1111_1111
6
6
5
5
4
4
3
3
2
2
1
1
0
0

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