ml670100 Oki Semiconductor, ml670100 Datasheet - Page 28

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

2.1
2.2
2.3
Higher Address
Lower Address
Memory Formats
From the programmer's point of view, the CPU can be in one of two states:
ARM state
THUMB state which operates with 16-bit, halfword-aligned THUMB instructions. In this
Note :
CPU Operating States
Switching State
Entering THUMB state
Entry into THUMB state can be achieved by executing a BX instruction with the state bit (bit 0)
set in the operand register.
Transition to THUMB state will also occur automatically on return from an exception(IRQ,
FIQ, UNDEF, SWI etc.), if the exception was entered with the processor in THUMB state.
Entering ARM state
Entry into ARM state happens:
The CPU views memory as a linear collection of bytes numbered upwards from zero.
Bytes 0 to 3 hold the first stored word, bytes 4 to 7 the second and so on. The CPU can treat
words in memory as being stored in Little Endian format.
Note :
1 On execution of the BX instruction with the state bit clear in the operand register.
2 On the processor taking an exception (IRQ, FIQ, RESET, UNDEF, SWI etc.).
In this case, the PC is placed in the exception mode's link register, and execution
commences at the exception's vector address.
Transition between these two states does not affect the CPU mode or the contents of
the registers.
The core architecture supports both big- and little- endian formats, but this LSI
uses only the latter.
Figure 2.1 : Little endian addresses of bytes within words
11
7
3
which executes 32-bit, word-aligned ARM instructions.
state, the PC uses bit 1 to select between alternate halfwords.
31
-Least significant byte is at lowest address
-Word is addressed by byte address of least significant byte
24 23
10
6
2
16 15
9
5
1
8 7
8
4
0
0
Word Address
8
4
0
2-2