ml670100 Oki Semiconductor, ml670100 Datasheet - Page 158

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
11.1
11-2
Overview
The External Memory Controller (XMC) generates control signals for accessing external
memory (ROM, SRAM, DRAM, etc.), and other devices with addresses in the external memory
space. It also controls the core bus, and peripheral bus during data transfers.
• Support for direct connection of ROM, SRAM, and I/O devices
• Support for direct connection of DRAM
• Memory space divided into four banks
• 32-bit access to internal ROM and RAM within a single clock cycle
• 16-bit access to on-chip peripherals within two clock cycles
• Single-stage store buffer permitting internal access during a write cycle to external
• Arbitration of external bus requests from external devices
- Strobe signal outputs for a variety of memory and I/O devices
- Multiplexed row and column addresses
- Random access and high-speed paged modes
- Programmable wait cycle insertion
- Support for CAS-before-RAS (CBR) refresh and self refresh
- Two banks for ROM, SRAM, and I/O devices
- Two banks for DRAM
- Address space of 16 megabytes for each bank
- Separate data bus width (8 or 16 bits), wait cycle, and "off time" settings for each bank
memory or device

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