ml670100 Oki Semiconductor, ml670100 Datasheet - Page 42

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
3.1
3.1.1
3-2
Overview
CPU control functions for this LSI include the following.
Pins
Table 3.1 lists the pins connected to the CPU control unit.
Table 3.1 : CPU Control Unit Pins
Pin Name
Reset input
Crystal oscillator input pin OSC0
Crystal oscillator output pin OSC1
System clock (SYSCLK)
output
PLL enable input
PLL frequency divider
selection input
VCO frequency selection
input
This function controls the system reset function for initializing the CPU and on-chip
peripherals.
This function controls the oscillator circuit based on a crystal oscillator and a built-in
phase-locked loop which together generate and control the system clock (SYSCLK)
signal. It offers a choice of divider ratio (1/1, 1/2, and 1/4) for adjusting operating clock
frequency to match the load of processing.
Standby mode control
Reset control
Clock control
This function controls the transitions to and from HALT mode.
Symbol
nRST
CLKOUT
PLLEN
FSEL
VCOM
Direction
input
input
output
output
input
input
input
Description
"L" level input to this pin produces an external system reset
for this LSI. "H" level input then causes execution to resume
from address 0x000000.
This pin is for connecting a crystal oscillator. If an external
clock is used, supply it to this pin.
This pin is for connecting a crystal oscillator. If an external
clock is used, leave this pin open
This output is the internal system clock (SYSCLK) signal.
Connecting this pin to V
loop. If the PLL is not used because an external clock with a
guaranteed duty is available, connect this pin to ground.
Connect this pin to V
range for the basic clock.
This input controls the oscillation frequency of the PLL's
voltage-controlled oscillator.
Connect it to ground.
DD
DD
or ground to indicate the frequency
enables the built-in phase-locked

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