ml670100 Oki Semiconductor, ml670100 Datasheet - Page 122

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
Bit Descriptions
ATRIRQ
This flag indicates the transmit ready state. The interface sets this flag to "1" when it is ready to
accept more transmit data - that is, when it transfers the contents of the transmit buffer
(ASBUF) to the transmit shift register.
Note that interrupt processing does not automatically clear this flag, so the program must - by
writing "1" to the bit.
ARVIRQ
This flag indicates the receive ready state. The interface sets this flag to "1" when receive data
is ready - that is, when it updates the receive buffer register.
Note that interrupt processing does not automatically clear this flag, so the program must - by
writing "1" to the bit.
Note also that, upon completion of each receive operation, the interface always updates the
receive buffer register and sets this flag to "1" regardless of any errors in the input.
PERR
This flag indicates a parity error. If the parity bit calculated for the received data does not
match the one included with the data, the interface sets this flag to "1."
OERR
This flag indicates an overrun error. If, at the end of a receive operation, the CPU has not read
the ASBUF contents from the preceding receive operation, the interface sets this flag to "1."
Note, however, that the new data replaces the old in the ASBUF register.
FERR
This flag indicates a framing error. The interface interprets a "0" received for a stop bit as
indicating loss of frame synchronization, so sets this flag to "1."
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