ml670100 Oki Semiconductor, ml670100 Datasheet - Page 99

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

7.2.2
MOD
This field specifies the operating mode for timer channel n. There are four choices: auto-reload
timer (ART), compare out (CMO), pulse width modulation (PWM), and capture (CAP).
TMCLK
This field specifies the count clock for Timer Counter n (TMnC, n=0 - 5). Timer channels 0
and 1 offer a choice of the system clock (SYSCLK) signal, time base clock signals 2TBCCLK
to 32TBCCLK from the Time Base Generator (TBG), and external clock signals; timer
channels 2 to 5, a choice of the system clock (SYSCLK) signal and time base clocks 2TBCCLK
to 128TBCCLK.
Timer Status Register n (TMnST, n=0 - 5) is an 8-bit read/write register that contains flags
noting overflow, compare matches, and capture events for Flexible Timer (FTM) channel n.
Writing "1" to a bit resets it to "0." Writing "0" produces no change.
After a system reset, this register contains 0x00.
Bit Descriptions
Timer Status Registers 0 to 5 (TMnST, n=0 - 5)
7
0
6
0
Figure 7.3 : Timer Status Registers 0 to 5 (TMnST, n=0 - 5)
5
0
A "0" indicates a reserved bit. Always write "0" to it.
Writing "1" produces unreliable operation.
4
0
3
0
2
0
CAPEV
CM/
1
OVF
0
CM(compare out mode)
CAPEV(capture mode)
0
1
0
1
0
1
TMnC and TMnGR not matched
TMnC and TMnGR matched
Event not generated
Event generated
Overflow not generated
Overflow generated
7-7