ml670100 Oki Semiconductor, ml670100 Datasheet - Page 175

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
11.2.12
The Refresh Control Register (RFCON) is an 8-bit read/write register that controls CAS-
before- RAS (CBR) refresh and self-refresh operation for the DRAM banks (2 and 3) and
specifies the count clock for the Refresh Timer Counter (RFTCN).
After a system reset, this register contains 0x00.
Do not change the CBRR field after replacing the initial 00b with a nonzero value to activate
the CAS-before-RAS (CBR) refresh function. Changing from a nonzero value to any other
value produces unreliable operation.
Refresh Control Register (RFCON)
7
0
6
Figure 11.14 : Refresh Control Register (RFCON)
A "0” indicates a reserved bit. Always write "0” to it.
Writing "1” produces unreliable operation.
CLKS
5
4
3
0
RSR
2
1
CBRR
0
000
001
010
011
100
101
110
111
00
01
10
11
0
1
Disable CBR refresh for both banks
Enable CBR refresh for bank 2
Enable CBR refresh for bank 3
Enable CBR refresh for both banks
Disable self-refresh operation
Enable self-refresh operation
RFTCN count clock = 2 TBCCLK
RFTCN count clock = 4 TBCCLK
RFTCN count clock = 8 TBCCLK
RFTCN count clock = 16 TBCCLK
RFTCN count clock = 32 TBCCLK
RFTCN count clock = 64 TBCCLK
RFTCN count clock = 128 TBCCLK
RFTCN count clock = 256 TBCCLK
11-19

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