ml670100 Oki Semiconductor, ml670100 Datasheet - Page 138
ml670100
Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
1.ML670100.pdf
(204 pages)
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9.2.3
9-6
CSI Status Register n (CSInST, n=0,1) is an 8-bit read/write register giving the status of Clock
Synchronous Serial Interface n (CSIn, n=0,1).
Only the BUSY bit is writeable.
After a system reset, this register contains 0x00.
Bit Descriptions
SFTCT
This 3-bit, read-only field gives the contents of the shift counter. When there is no transfer
underway, it contains 000b. It increments for each bit transferred, returning to 000b at the end
of the transfer.
BUSY
A "1" in this flag indicates that a transfer is underway. The serial port automatically sets this bit
to "1" when a transfer starts and resets it to "0" when the transfer ends.
Writing "0" to this bit while a transfer is underway aborts the transfer and initializes Clock
Synchronous Serial Interface n (CSIn, n=0,1) by clearing the SFTCT field in CSI Status
Register n (CSInST, n=0,1) to 000b.
CSI Status Registers 0,1 (CSInST, n=0,1)
7
0
6
Figure 9.4 : CSI Status Register n (CSInST, n=0,1)
A "0" indicates a reserved bit. Always write "0" to it.
Writing "1" produces unreliable operation.
SFTCT
5
4
3
0
2
0
1
0
BUSY
0
0
1
3-bit shift counter
(000b to 111b)
Idle
Busy transferring data
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