R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 101

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

This LSI has a clock pulse generator (CPG) that generates an internal clock (Iφ), a peripheral clock
(Pφ), and a bus clock (Bφ). The CPG consists of a crystal oscillator, PLL circuits, and divider
circuits.
4.1
• Three clock operating modes
• Three clocks generated independently
• Frequency change function
• Power-down mode control
The mode is selected from among the three clock operating modes by the selection of the
following three conditions: the frequency-divisor in use, whether the PLLs are on or off, and
whether the internal crystal resonator or the input on the external clock-signal line is used.
An internal clock (Iφ) for the CPU and cache; a peripheral clock (Pφ) for the on-chip
peripheral modules; a bus clock (Bφ = CKIO) for the external bus interface.
Internal and peripheral clock frequencies can be changed independently using the PLL (phase
locked loop) circuits and divider circuits within the CPG. Frequencies are changed by software
using frequency control register (FRQCR) settings.
The clock can be stopped by sleep mode, software standby mode, and deep standby mode.
Specific modules can also be stopped using the module standby function. For details on clock
control in the power-down modes, see section 25, Power-Down Modes.
Features
Section 4 Clock Pulse Generator (CPG)
Rev. 2.00 Sep. 07, 2007 Page 73 of 1164
Section 4 Clock Pulse Generator (CPG)
REJ09B0321-0200