R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 679

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

15.3.14 Month Alarm Register (RMONAR)
RMONAR is an alarm register corresponding to the BCD coded month counter RMONCNT.
When the ENB bit is set to 1, a comparison with the RMONCNT value is performed. From among
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR/RCR3, the counter and alarm
register comparison is performed only on those with ENB bits set to 1, and if each of those
coincides, an alarm flag of RCR1 is set to 1.
The assignable range is from 01 through 12 + ENB bits (practically in BCD), otherwise operation
errors occur.
The ENB bit in RMONAR is initialized by a power-on reset or in deep standby mode. The other
bits are not initialized by a power-on reset or manual reset, or in deep standby and software
standby modes.
Bit
7
6, 5
4
3 to 0
Bit Name
ENB

10 months
1 month
Initial value:
Initial
Value
0
All 0
Undefined R/W
Undefined R/W
R/W:
Bit:
ENB
R/W
7
0
R/W
R/W
R
—
R
6
0
Description
When this bit is set to 1, a comparison with the
Reserved
These bits are always read as 0. The write value should
always be 0.
Ten's position of months setting value
One's position of months setting value
RMONCNT value is performed.
—
R
5
0
months
R/W
10
—
4
R/W
—
3
Rev. 2.00 Sep. 07, 2007 Page 651 of 1164
R/W
—
2
1 month
R/W
—
1
Section 15 Realtime Clock (RTC)
R/W
—
0
REJ09B0321-0200