R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 635

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Notes: 1. Only 0 can be written to bits 7 to 5, to clear these flags.
• TCSR_1
Bit
1, 0
Bit
7
6
5
2. Timer output is disabled when bits OS3 to OS0 are all 0. Timer output is 0 until the first
Bit Name
OS[1:0]
Bit Name
CMFB
CMFA
OVF
compare match occurs after resetting.
Initial
Value
00
Initial
Value
0
0
0
R/W
R/(W)*
R/(W)*
R/(W)*
R/W
R/W
1
1
1
Description
Output Select 1 and 0*
These bits select a method of TMO pin output when
compare match A of TCORA and TCNT occurs.
00: No change when compare match A occurs
01: 0 is output when compare match A occurs
10: 1 is output when compare match A occurs
11: Output is inverted when compare match A occurs
Description
Compare Match Flag B
[Setting condition]
•
[Clearing condition]
•
Compare Match Flag A
[Setting condition]
•
[Clearing condition]
•
Timer Overflow Flag
[Setting condition]
•
[Clearing condition]
•
(toggle output)
When TCNT matches TCORB
When writing 0 after reading CMFB = 1
When TCNT matches TCORA
When writing 0 after reading CMFA = 1
When TCNT overflows from H'FF to H'00
When writing 0 after reading OVF = 1
Rev. 2.00 Sep. 07, 2007 Page 607 of 1164
2
Section 13 8-Bit Timers (TMR)
REJ09B0321-0200