R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 111

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

4.4
The clock pulse generator has the following registers.
Table 4.4
4.4.1
FRQCR is a 16-bit readable/writable register used to specify whether a clock is output from the
CKIO pin in software standby mode, the frequency multiplication ratio of PLL circuit 1, and the
frequency division ratio of the internal clock and peripheral clock (Pφ). Only word access can be
used on FRQCR.
FRQCR is initialized to H'1003 only by a power-on reset or in deep standby mode. FRQCR retains
its previous value by a manual reset or in software standby mode. The previous value is also
retained when an internal reset is triggered by an overflow of the WDT.
Bit
15 to 13
Register Name
Frequency control register
CKIO control register
Initial value:
R/W:
Bit:
Register Descriptions
Frequency Control Register (FRQCR)
Bit Name

15
—
R
0
Register Configuration
14
—
R
0
13
—
R
0
Initial
Value
All 0
CKOEN
R/W
12
1
Abbreviation R/W
FRQCR
CKIOCR
11
—
R
0
R/W
R
R/W
10
0
STC[2:0]
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
9
0
R/W
R/W
R/W
8
0
Initial Value Address
H'1003
H'10/H'00
—
R
7
0
R/W
Rev. 2.00 Sep. 07, 2007 Page 83 of 1164
6
0
Section 4 Clock Pulse Generator (CPG)
IFC[2:0]
R/W
5
0
H'FFFE0010 16
H'FFFE3894 8, 16, 32
R/W
4
0
RNGS
R/W
3
0
REJ09B0321-0200
R/W
2
0
Access Size
PFC[2:0]
R/W
1
1
R/W
0
1