R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 919
R5S72011
Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72011.pdf
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20.5
The A/D converter generates an A/D conversion end interrupt (ADI) at the end of A/D conversion.
An ADI interrupt request is generated if the ADIE bit is set to 1 when the ADF bit in ADCSR is
set to 1 on completion of A/D conversion. Note that the direct memory access controller (DMAC)
can be activated by an ADI interrupt depending on the DMAC setting. In this case, an interrupt is
not issued to the CPU. If the setting to activate the DMAC has not been made, an interrupt request
is sent to the CPU. Having the converted data read by the DMAC in response to an ADI interrupt
enables continuous conversion to be achieved without imposing a load on software.
In single mode, set the DMAC so that DMA transfer initiated by an ADI interrupt is performed
only once. In the case of A/D conversion on multiple channels in scan mode or multi mode, setting
the DMA transfer count to one causes DMA transfer to finish after transferring only one channel
of data. To make the DMAC transfer all conversion data, set the ADDR where A/D conversion
data is stored as the transfer source address, and the number of converted channels as the transfer
count.
When the DMAC is activated by ADI, the ADF bit in ADCSR is automatically cleared to 0 when
data is transferred by the DMAC.
Table 20.6 Relationship between Interrupt Sources and DMAC Transfer Request
20.6
The A/D converter compares an analog value input from an analog input channel with its analog
reference value and converts it to 10-bit digital data. The absolute accuracy of this A/D conversion
is the deviation between the input analog value and the output digital value. It includes the
following errors:
• Offset error
• Full-scale error
• Quantization error
• Nonlinearity error
Name
ADI
Interrupt Sources and DMAC Transfer Request
Definitions of A/D Conversion Accuracy
Interrupt Source
A/D conversion end
Interrupt Flag
ADF in ADCSR
Rev. 2.00 Sep. 07, 2007 Page 891 of 1164
Section 20 A/D Converter (ADC)
DMAC Activation
Possible
REJ09B0321-0200
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