R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 885

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
The following table shows conditions to access registers.
Table 19.8 Conditions to Access Registers
Notes: 1. No hardware protection
19.6.2
The RCAN-ET has various test modes. The register TST[2:0] (MCR[10:8]) is used to select the
RCAN-ET test mode. The default (initialized) settings allow RCAN-ET to operate in Normal
mode. The following table is examples for test modes.
Test Mode can be selected only while in configuration mode. The user must then exit the
configuration mode (ensuring BCR0/BCR1 is set) in order to run the selected test mode.
Table 19.9 Test Mode Settings
Status Mode
Reset
Transmission
Reception
Halt Request
Halt
Sleep
Bit10:
TST2
0
0
0
0
1
1
1
1
2. When TXPR is not set.
Test Mode Settings
Bit9:
TST1
0
0
1
1
0
0
1
1
Yes
Yes
Yes
MCR
GSR
Yes
Yes
Bit8:
TST0
0
1
0
1
0
1
0
1
IRR
IMR
Yes
Yes
Yes
Yes
Yes
Description
Normal mode (initial value)
Listen-only mode (receive-only mode)
Self test mode 1 (external)
Self test mode 2 (internal)
Write error counter
Error passive mode
Setting prohibited
Setting prohibited
BCR
Yes
No*
No*
No*
No
1
1
1
Yes
No
MBIMR
Yes
Yes
Yes
RCAN-ET Registers
Flag_register
Yes
Yes
Yes
Yes
No
Section 19 Controller Area Network (RCAN-ET)
Rev. 2.00 Sep. 07, 2007 Page 857 of 1164
mailbox
(ctrl0, LAFM)
Yes
No*
No*
Yes
No
1
1
Yes*
Yes*
2
2
Yes
No
mailbox
(data)
Yes*
Yes*
Yes
2
2
REJ09B0321-0200
No
mailbox
(ctrl1)
Yes
No*
No*
Yes
1
1
Yes*
Yes*
2
2

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