R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 701

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
16.3.5
SCSMR specifies the SCIF serial communication format and selects the clock source for the baud
rate generator.
The CPU can always read and write to SCSMR. SCSMR is initialized to H'0000 by a power-on
reset or in deep standby mode.
Bit
15 to 8
7
6
Initial value:
R/W:
Bit:
Serial Mode Register (SCSMR)
Bit Name
C/A
CHR
15
R
0
14
R
0
13
R
0
Initial
Value
All 0
0
0
12
R
0
11
R
0
R/W
R
R/W
R/W
10
R
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Communication Mode
Selects whether the SCIF operates in asynchronous or
clocked synchronous mode.
0: Asynchronous mode
1: Clocked synchronous mode
Character Length
Selects 7-bit or 8-bit data length in asynchronous mode.
In the clocked synchronous mode, the data length is
always 8 bits, regardless of the CHR setting.
0: 8-bit data
1: 7-bit data*
Note: *
Section 16 Serial Communication Interface with FIFO (SCIF)
R
9
0
R
8
0
When 7-bit data is selected, the MSB (bit 7)
of the transmit FIFO data register is not
transmitted.
R/W
C/A
7
0
Rev. 2.00 Sep. 07, 2007 Page 673 of 1164
CHR
R/W
6
0
R/W
PE
5
0
R/W
O/E STOP
4
0
R/W
3
0
REJ09B0321-0200
R
2
0
R/W
CKS[1:0]
1
0
R/W
0
0

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