MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 486

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
11.3.2.10 Reserved Register (FORBYP)
Read: Always read $00 except in special modes
Write: Only in special modes
11.3.2.11 Reserved Register (CTCTL)
Read: Always read $00 except in special modes
486
Module Base + 0x0009
Module Base + 0x000A
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
W
R
R
0
0
0
0
7
7
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in special
modes can alter the S12XECRG’s functionality.
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in special test
modes can alter the S12XECRG’s functionality.
= Unimplemented or Reserved
= Unimplemented or Reserved
1. OSCCLK cycles are referenced from the previous COP time-out reset
(writing $55/$AA to the ARMCOP register)
CR2
0
0
0
0
6
6
1
Figure 11-12. Reserved Register (FORBYP)
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 11-13. Reserved Register (CTCTL)
Table 11-13. COP Watchdog Rates
CR1
1
5
0
0
5
0
0
CR0
1
NOTE
NOTE
0
0
0
0
4
4
Cycles to Timeout
0
0
0
0
3
3
OSCCLK
2
24
(1)
2
0
0
2
0
0
Freescale Semiconductor
0
0
0
0
1
1
0
0
0
0
0
0

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