MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 692

• Manufacturer Part Number: MC9S12XEP100CAL
• Description: IC MCU 16BIT 1M FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XEP100CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 64 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 25
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 12-bit
• Package: 112LQFP
• Family Name: HCS12X
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 1.8|2.8|5 V
• For Use With: EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 18 Periodic Interrupt Timer (S12PIT24B4CV2)
modify-write instruction which writes back the “bit-wise or” of the flag_register and the mask into the
flag_register. BSET would clear all flag bits that were set, independent from the mask.
For example, to clear flag bit 0 use: MOVB #$01,PITTF.
18.6
To get started quickly with the PIT24B4C module this section provides a small code example how to use
the block. Please note that the example provided is only one specific case out of the possible configurations
and implementations.
Functionality: Generate an PIT interrupt on channel 0 every 500 PIT clock cycles.
; ******************** Start PIT Initialization *******************************************************
;******************** Main Program *************************************************************
MAIN:
;******************** Channel 0 Interupt Routine ***************************************************
CH0_ISR:
692
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indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Application Information
ORG
LDS
MOVW
CLR
MOVB
CLR
MOVB
MOVW
MOVB
MOVB
CLI
BRA *
LDAA
MOVB
RTI
CODESTART
RAMEND
#CH0_ISR,VEC_PIT_CH0 ; Change value of channel 0 ISR adr
PITCFLMT
#$01,PITCE
PITMUX
#$63,PITMTLD0
#$0004,PITLD0
#$01,PITINTE
#$80,PITCFLMT
PITTF
#$01,PITTF
MC9S12XE-Family Reference Manual , Rev. 1.23
; place the program into specific
; range (to be selected)
; load stack pointer to top of RAM
; disable PIT
; enable timer channel 0
; ch0 connected to micro timer 0
; micro time base 0 equals 100 clock cycles
; time base 0 eq. 5 micro time bases 0 =5*100 = 500
; enable interupt channel 0
; enable PIT
; clear Interupt disable Mask bit
; loop until interrupt
; 8 bit read of PIT time out flags
; clear PIT channel 0 time out flag
; return to MAIN
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