EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 119

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 5: Clock Networks and PLLs in Arria II GX Devices
PLLs in Arria II GX Devices
Figure 5–20. Automatic Switchover Upon Loss of Clock Detection
Note to
(1) Switchover is enabled on the falling edge of inclk0 or inclk1, depending on which clock is available. In this figure, switchover is enabled on
© July 2010
the falling edge of inclk1.
Figure
Altera Corporation
5–20:
Manual Override Mode
In automatic switchover with manual override mode, you can use the clkswitch
input for user- or system-controlled switch conditions. You can use this mode for
same-frequency switchover or to switch between inputs of different frequencies. For
example, if inclk0 is 66 MHz and inclk1 is 200 MHz, you must control the
switchover when you use clkswitch because the automatic clock-sense circuitry
cannot monitor clock input (inclk0 and inclk1) frequencies with a frequency
difference of more than 100% (2×). This feature is useful when the clock sources
originate from multiple cards on the backplane, requiring a system-controlled
switchover between the frequencies of operation. You must choose the backup clock
frequency and set the m, n, c, and k counters accordingly so the VCO operates in the
recommended operating frequency range of 600 to 1,300 MHz. The ALTPLL
MegaWizard
inclk0 and inclk1 frequencies cannot meet this requirement.
Figure 5–21
by the clkswitch signal. In this case, both clock sources are functional and inclk0
is selected as the reference clock. The clkswitch signal goes high, which starts the
switchover sequence. On the falling edge of inclk0, the counter’s reference clock
(muxout) is gated off to prevent clock glitching. On the falling edge of inclk1, the
reference clock multiplexer switches from inclk0 to inclk1 as the PLL reference,
and the activeclock signal changes to indicate which clock is currently feeding the
PLL.
activeclock
clkbad0
clkbad1
muxout
inclk0
inclk1
shows an example waveform of the switchover feature when controlled
™
Plug-In Manager interface notifies you if a given combination of
(1)
Arria II GX Device Handbook, Volume 1
5–27