EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 41

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Memory Features
© November 2009
AIIGX51003-2.0
Altera Corporation
Arria
9-Kbit M9K blocks. You can configure each embedded memory block independently
to be a single- or dual-port RAM, FIFO, ROM, or shift register with the Quartus
MegaWizard
type to produce larger memories with minimal timing penalty. This chapter describes
memory blocks, modes, features, and design considerations.
This chapter contains the following sections:
■
■
■
■
Table 3–1
Table 3–1. Summary of Memory Features (Part 1 of 2)
Maximum performance
Total RAM bits (including parity bits)
Configurations (depth × width)
Parity bits
Byte enable
Packed mode
Address clock enable
Single-port memory
Simple dual-port memory
True dual-port memory
Embedded shift register
ROM
“Memory Features”
“Memory Modes” on page 3–7
“Clocking Modes” on page 3–15
“Design Considerations” on page 3–16
®
II GX memory blocks include 640-bit memory logic array blocks (MLABs) and
lists the features supported by the memory blocks.
TM
Feature
Plug-In Manager. You can stitch together multiple blocks of the same
3. Memory Blocks in Arria II GX Devices
500 MHz
64 × 10
32 × 16
32 × 18
32 × 20
MLABs
64 × 8
64 × 9
640
v
v
v
v
v
v
v
—
—
(1)
Arria II GX Device Handbook, Volume 1
390 MHz
M9K Blocks
512 × 16
512 × 18
256 × 32
256 × 36
8K × 1
4K × 2
2K × 4
1K × 8
1K × 9
9,216
v
v
v
v
v
v
v
v
v
(1)
®
II