EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 170

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EP2AGX65DF29C6N

Manufacturer Part Number
EP2AGX65DF29C6N
Description
IC ARRIA II GX FPGA 65K 780FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX65DF29C6N

Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5246
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
63250
# I/os (max)
364
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
63250
Ram Bits
5557452.8
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

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7–12
Figure 7–10. DQS Pins in Arria II GX I/O Banks for EP2AGX260 with the F1152 Package
Arria II GX Device Handbook, Volume 1
1
The corresponding DQ pins are marked as DQXY, where X indicates to which DQS
group the pins belong to and Y indicates whether the group is located on the top (T),
bottom (B), or right (R) side of the device. For example, DQS3B indicates a DQS pin
that is located on the bottom side of the device. The DQ pins belonging to that group
are shown as DQ3B in the pin table. See
The parity, DM, BWSn, and ECC pins are shown as DQ pins in the pin table.
The numbering scheme starts from the top-left side of the device going clockwise in a
die-top view.
view of the largest Arria II GX device.
PLL1
PLL4
DLL0
DQS1T
DQS24B
Figure 7–10
8B
3B
shows how the DQ/DQS groups are numbered in a die-top
8A
Arria II GX Device
3A
7A
4A
Figure 7–10
Chapter 7: External Memory Interfaces in Arria II GX Devices
7B
4B
DQS1B
DQS24T
for illustrations.
6B
6A
5B
5A
DLL1
Arria II GX Memory Interfaces Pin Support
PLL2
PLL5
PLL6
DQS1R
DQS24R
PLL3
© July 2010 Altera Corporation

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