EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 142

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

6–8
Programmable Current Strength
Arria II GX Device Handbook, Volume 1
f
1
For more information about DPA support, refer to the
Interfaces with DPA in Arria II GX Devices
The output buffer for each Arria II GX device I/O pin has a programmable
current-strength control for certain I/O standards. You can use programmable current
strength to mitigate the effects of high signal attenuation due to a long transmission
line or a legacy backplane. The LVTTL, LVCMOS, SSTL, and HSTL standards have
several levels of current strength that you can control.
programmable current strength settings.
Table 6–4. Programmable Current Strength Settings
Altera recommends performing IBIS or SPICE simulations to determine the right
current strength setting for your specific application.
3.3-V LVTTL
3.3-V LVCMOS
3.0-V LVTTL
3.0-V LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
1.2-V LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
SSTL-15 Class I
HSTL-18 Class I
HSTL-18 Class II
HSTL-15 Class I
HSTL-15 Class II
HSTL-12 Class I
HSTL-12 Class II
BLVDS
Notes to
(1) The default current strength setting in the Quartus II software is 50- R
(2) The default current strength setting in the Quartus II software is the current strength shown in brackets [].
non-voltage reference and HSTL/SSTL Class I I/O standards. The default setting is 25- R
for HSTL/SSTL Class II I/O standards.
Table
(2)
6–4:
(2)
I/O Standard
chapter.
I
OL
for Top, Bottom, and Right I/O Pins
(Note 1)
/ I
OH
Chapter 6: I/O Features in Arria II GX Devices
Current Strength Setting (mA)
High-Speed Differential I/O
Table 6–4
16, 12, 10, 8, 6, 4, 2
16, 12, 10, 8, 6, 4, 2
S
12, 10, 8, 6, 4, 2
OCT without calibration for all
16, 12, 8, 4
16, 12, 8, 4
16, 12, 8, 4
[12], 8, 4
12, 10, 8
12, 10, 8
12, 10, 8
12, 10, 8
12, 10, 8
8, 12, 16
16, 12
12, 8
© July 2010 Altera Corporation
[2]
16
16
16
16
lists the
S
OCT without calibration
Arria II GX I/O Structure