R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 111

• Manufacturer Part Number: R5F213J6CNNP#U0
• Description: MCU 1KB FLASH 32K ROM 36-QFN
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/3JCr

Specifications of R5F213J6CNNP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-WQFN Exposed Pad, 36-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
7.4.18
Note:
7.4.19
Note:
1. Both “H” and “L” output are set to high drive capacity.
1. Both “H” and “L” output are set to high drive capacity.
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 01F0h
Address 01F1h
The P1DRR register selects whether the drive capacity of the P1 output transistor is set to low or high.
The P1DRRi bit (i = 0 to 7) is used to select whether the drive capacity of the output transistor is set to low or
high for each pin.
For pins used as output, the setting values in the P1DRR register are valid.
The P2DRR register selects whether the drive capacity of the P2 output transistor is set to low or high. The
P2DRRi bit (i = 0 to 5) is used to select whether the drive capacity of the output transistor is set to low or high
for each pin.
For pins used as output, the setting values in the P2DRR register are valid.
Symbol P1DRR7 P1DRR6 P1DRR5 P1DRR4 P1DRR3 P1DRR2 P1DRR1 P1DRR0
Symbol
P1DRR0 P1_0 drive capacity
P1DRR1 P1_1 drive capacity
P1DRR2 P1_2 drive capacity
P1DRR3 P1_3 drive capacity
P1DRR4 P1_4 drive capacity
P1DRR5 P1_5 drive capacity
P1DRR6 P1_6 drive capacity
P1DRR7 P1_7 drive capacity
P2DRR0 P2_0 drive capacity
P2DRR1 P2_1 drive capacity
P2DRR2 P2_2 drive capacity
P2DRR3 P2_3 drive capacity
P2DRR4 P2_4 drive capacity
P2DRR5 P2_5 drive capacity
Symbol
Symbol
Bit
Bit
Port P1 Drive Capacity Control Register (P1DRR)
Port P2 Drive Capacity Control Register (P2DRR)
—
—
b7
b7
—
0
0
Reserved bits
b6
b6
—
0
0
Bit Name
Bit Name
P2DRR5 P2DRR4 P2DRR3 P2DRR2 P2DRR1 P2DRR0
b5
b5
0
0
b4
b4
0
0
0: Low
1: High
0: Low
1: High
Set to 0.
b3
b3
0
0
(1)
(1)
b2
b2
0
0
Function
Function
b1
b1
0
0
b0
b0
0
0
Page 80 of 715
7. I/O Ports
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W