R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 120

• Manufacturer Part Number: R5F213J6CNNP#U0
• Description: MCU 1KB FLASH 32K ROM 36-QFN
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/3JCr

Specifications of R5F213J6CNNP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-WQFN Exposed Pad, 36-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
Table 7.16
X: 0 or 1
Notes:
Table 7.17
X: 0 or 1
Notes:
Table 7.18
X: 0 or 1
Notes:
Register
Register
Register
Setting
Setting
Setting
Value
Value
Value
Bit
Bit
Bit
1. Pulled up by setting the PU03 bit in the PUR0 register to 1.
2. Output drive capacity high by setting the P1DRR5 bit in the P1DRR register to 1.
1. Pulled up by setting the PU03 bit in the PUR0 register to 1.
2. Output drive capacity high by setting the P1DRR6 bit in the P1DRR register to 1.
1. Pulled up by setting the PU03 bit in the PUR0 register to 1.
2. Output drive capacity high by setting the P1DRR7 bit in the P1DRR register to 1.
PD1_7
PD1_5
PD1_6
PD1
PD1
PD1
X
0
1
0
0
0
0
X
X
0
1
0
0
0
0
0
0
0
1
0
0
Port P1_5/RXD0/TRAIO/INT1
Port P1_6/CLK0/IVREF1
Port P1_7/INT1/TRAIO/IVCMP1
Other than 01b
Other than 01b
Other than 01b
Other than 01b
RXD0SEL0
CLK0SEL0
TRAIOSEL
1
0
0
0
U0SR
U0SR
TRASR
X
X
1
X
X
X
X
1
1
0
0
1
1
0
0
1
1
1
Other than 10b
Other than 10b
Other than 10b
Other than 10b
X
X
X
X
2
0
TRAIOSEL
TRAIOC
1
1
1
1
1
1
TOPCR
TRASR
X
X
X
X
0
0
0
SMD
X
X
X
X
1
0
0
0
0
0
0
0
U0MR
2
X
X
X
0
X
000b, 001b
000b, 001b
Other than
Other than
X
X
X
X
0
1
TRAMR
TMOD
TRAIOC
TOPCR
X
X
X
X
1
0
X
X
X
0
X
0
0
0
0
CKDIR
X
X
X
1
0
X
X
X
X
0
1
Master mode:
Slave mode:
2
X
X
X
X
0
000b, 001b
000b, 001b
Other than
Other than
X
X
X
X
X
2
0
0
TRAMR
INT1SEL
TMOD
INT1CP0
INTCMP
INTSR
000b
011b
1
X
X
X
X
0
X
X
X
X
X
1
0
0
X
X
X
X
1
0
X
X
X
X
1
X
X
X
X
X
0
0
0
Input port
Output port
CLK0 (external clock) input
CLK0 (internal clock) output
Comparator B1 reference voltage input (IVREF1)
INT1EN INT1CP0
2
X
X
X
X
0
0
X
X
0
INTEN
INT1SEL
INTSR
X
X
X
X
1
1
1
1
X
X
X
X
0
0
X
X
0
(1)
INTCMP
X
X
X
X
X
X
0
1
1
1
(2)
X
X
X
X
0
0
1
INT1EN INT1CP0
INTEN
X
X
X
X
X
X
1
1
1
Input port
Output port
TRAIO input
INT1 input
TRAIO/INT1 input
TRAIO pulse output
Comparator B1 input (IVCMP1)
Function
INTCMP
(1)
(2)
X
X
X
X
X
X
0
0
0
(1)
(1)
Function
(2)
(1)
Input port
Output port
RXD0 input
TRAIO input
INT1 input
TRAIO/INT1
input
TRAIO pulse
output
TRAIO/RXD0
input
(Hardware LIN)
TRAIO/RXD0/
INT1 input
(Hardware LIN)
Page 89 of 715
(1)
Function
(2)
(1)
7. I/O Ports
(2)
(1)
(1)
(2)
(1)
(1)