R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 124

MCU 1KB FLASH 32K ROM 36-QFN

R5F213J6CNNP#U0

Manufacturer Part Number
R5F213J6CNNP#U0
Description
MCU 1KB FLASH 32K ROM 36-QFN
Manufacturer
Renesas Electronics America
Series
R8C/3x/3JCr
Datasheet

Specifications of R5F213J6CNNP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
36-WQFN Exposed Pad, 36-HWQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R5F213J6CNNP#U0
Manufacturer:
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Quantity:
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R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
Table 7.27
X: 0 or 1
Notes:
Register
Setting
Value
Bit
1.
2.
3.
4.
Output drive capacity high by setting the DRR07 bit in the DRR0 register to 1.
Pulled up by setting the PU07 bit in the PUR0 register to 1.
N-channel open-drain output by setting the SOOS bit in the SSMR2 register to 1 (N-channel open-drain output) and setting the BIDE bit in the
SSMR2 register to 0 (standard mode).
N-channel open-drain output by setting the NCH bit in the U2C0 register to 1.
PD3_4
PD3
X
X
X
X
X
0
1
0
0
0
0
0
0
SSUIICSR
IICSEL
Port P3_4/TRCIOC/TRDIOC1/SSI/RXD2/SCL2/TXD2/SDA2/IVREF3
X
X
X
X
X
X
X
X
X
X
X
0
0
Communication
Communication
control
Modes and I/O
output
Unit (Refer to
Synchronous
Association
SSI
Table 25.4
0
0
0
0
0
0
0
1
0
0
0
0
0
between
Pins .)
Serial
control
input
SSI
0
0
0
0
0
0
1
0
0
0
0
0
0
Other than
Other than
Other than
Other than
Other than
Other than
TRCPSR1 TRDPSR1
2
0
0
X
X
X
X
X
TRCIOC
010b
010b
010b
010b
010b
010b
SEL
1
1
1
X
X
X
X
X
X
X
X
X
X
0
0
0
Other than
Other than
Other than
Other than
Other than
Other than
TRDIOC1
X
X
X
X
X
1
1
1
SEL
10b
10b
10b
10b
10b
10b
X
X
X
X
X
0
0
0
RXD2
Other
Other
Other
Other
Other
Other
Other
1
X X
X X
0
0
X X
X X
SEL
than
than
than
than
than
than
than
01b
01b
01b
01b
01b
01b
01b
0
1
1
U2SR0
Other than
Other than
Other than
Other than
Other than
Other than
Other than
Other than
Other than
X
X
2
0
0
TXD2
010b
010b
010b
010b
010b
010b
010b
010b
010b
SEL
X
X
1
1
1
0
X
X
0
0
X X X
2
X X X
X X X
X X X
X X X
X X X
X X X
X X X
X X X
0
0
1
0
X X X
U2MR
SMD
1
1
0
1
1
0
0
1
0
1
0
0
U2SMR INTCMP
IICM
X
X
X
X
X
X
X
X
X
X
X
1
1
INT3
CP0
X
X
X
X
X
X
X
X
X
X
X
X
1
TRCIOC Pin
TRCIOC Pin
Pin Setting
Pin Setting
Table 7.40
Table 7.40
Table 7.48
Table 7.48
TRDIOC1
TRDIOC1
Timer RC
Refer to
Refer to
Refer to
Refer to
Setting
Setting
Setting
X
X
X
X
X
X
X
X
X
Page 93 of 715
Input port
Output port
TRCIOC
input
TRCIOC
output
TRDIOC1
input
TRDIOC1
output
SSI input
SSI
output
RXD2
input
SCL2 input/
output
TXD2
output
SDA2 input/
output
Comparator
B3 reference
voltage input
(IVREF3)
7. I/O Ports
Function
(1)
(1)
(1)
(2, 3)
(2, 4)
(2, 4)
(2)
(2)
(2, 4)
(1)
(1)
(2)

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