R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 217

• Manufacturer Part Number: R5F213J6CNNP#U0
• Description: MCU 1KB FLASH 32K ROM 36-QFN
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/3JCr

Specifications of R5F213J6CNNP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-WQFN Exposed Pad, 36-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
Figure 15.1
15.2
When the DTC is activated, control data (DTCCRj, DTBLSj, DTCCTj, DTRLDj, DTSARj, and DTDARj, j = 0 to
23) allocated in the control data area is read, and then transferred to the control registers (DTCCR, DTBLS,
DTCCT, DTRLD, DTSAR, and DTDAR) in the DTC. On completion of the DTC data transfer, the contents of the
DTC control registers are written back to the control data area.
Each DTCCR, DTBLS, DTCCT, DTRLD, DTSAR, and DTDAR register cannot be directly read or written to.
DTCCRj, DTBLSj, DTCCTj, DTRLDj, DTSARj, and DTDARj are allocated as control data at addresses from
2C40h to 2CFFh in the DTC control data area, and can be directly accessed.
Also, registers DTCTL and DTCENi (i = 0 to 6) can be directly accessed.
Registers
DTC Block Diagram
Interrupt controller
DTCEN0
DTCEN6
DTCTL
to
Peripheral interrupt
request
DTC activation
request
DTCCR
DTCCT
DTRLD
DTSAR
DTDAR
DTBLS
CPU
Bus interface
Peripheral bus
DTCCR: DTC control register
DTBLS: DTC block size register
DTCCT: DTC transfer count register
DTRLD: DTC transfer count reload register
DTSAR: DTC source address register
DTDAR: DTC destination address register
DTCTL: DTC activation control register
DTCEN0 to DTCEN6:
DTC activation enable registers 0 to 6
Page 186 of 715
15. DTC