R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 433
R5F213J6CNNP#U0
Manufacturer Part Number
R5F213J6CNNP#U0
Description
MCU 1KB FLASH 32K ROM 36-QFN
Manufacturer
Renesas Electronics America
Series
R8C/3x/3JCr
Datasheet
1.R5F213J6CNNPU0.pdf
(750 pages)
Specifications of R5F213J6CNNP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
36-WQFN Exposed Pad, 36-HWQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
20.10.5 Count Source Switch
20.10.6 Input Capture Function
20.10.7 Reset Synchronous PWM Mode
•
Switching procedure
(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).
(2) Change bits TCK2 to TCK0 in the TRDCRi register.
•
Switching procedure
(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).
(2) Change bits TCK2 to TCK0 in the TRDCRi register.
(3) Wait 2 or more cycles of f1.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator stops).
•
Switching procedure
(1) Set the TSTARTi (i = 0 to 1) bit in the TRDSTR register to 0 (count stops).
(2) Change the settings of bits TCK2 to TCK0 in the TRDCRi register.
(3) Wait for a minimum of two cycles of fOCO-F.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator off).
•
Switching procedure
(1) Set the TSTARTi (i = 0 to 1) bit in the TRDSTR register to 0 (count stops).
(2) Change the settings of bits TCK2 to TCK0 in the TRDCRi register.
(3) Wait for a minimum of one cycle of fOCO-F + fOCO40M.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator off).
•
•
•
•
Switching procedure
(1) Set the TSTART0 bit in the TRDSTR register to 0 (count stops).
(2) Set bits CMD1 to CMD0 in the TRDFCR register to 00b (timer mode, PWM mode, and PWM3 mode).
(3) Set bits CMD1 to CMD0 to 01b (reset synchronous PWM mode).
(4) Set the other registers associated with timer RD again.
Switch the count source after the count stops.
When changing the count source from fOCO40M to another source and stopping fOCO40M, wait 2 cycles of
f1 or more after setting the clock switch, and then stop fOCO40M.
After switching the count source from fOCO-F to fOCO40M, allow a minimum of two cycles of fOCO-F to
elapse after changing the clock setting before stopping fOCO-F.
After switching the count source from fOCO-F to a clock other than fOCO40M, allow a minimum of one
cycle of fOCO-F + fOCO40M to elapse after changing the clock setting before stopping fOCO-F.
Set the pulse width of the input capture signal to 3 or more cycles of the timer RD operation clock (refer to
Table 20.1 Timer RD Operation Clocks).
The value in the TRDi register is transferred to the TRDGRji register 2 to 3 cycles of the timer RD operation
clock after the input capture signal is applied to the TRDIOji pin (i = 0 or 1, j = A, B, C, or D) (no digital
filter).
When reset synchronous PWM mode is used for motor control, make sure OLS0 = OLS1.
Set to reset synchronous PWM mode by the following procedure:
Page 402 of 715
20. Timer RD
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