R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 591

• Manufacturer Part Number: R5F213J6CNNP#U0
• Description: MCU 1KB FLASH 32K ROM 36-QFN
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/3JCr

Specifications of R5F213J6CNNP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-WQFN Exposed Pad, 36-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
27. Hardware LIN
The hardware LIN performs LIN communication in cooperation with timer RA and UART0.
27.1
Figure 27.1
RXD0 pin
TXD0 pin
The hardware LIN has the features listed below.
Figure 27.1 shows a Hardware LIN Block Diagram.
The wake-up function for each mode is detected using INT1.
Master mode
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•
Slave mode
•
•
•
•
Synch Break generation
Bus collision detection
Synch Break detection
Synch Field measurement
Control function for Synch Break and Synch Field signal inputs to UART0
Bus collision detection
Overview
LINE, MST, SBE, LSTART, BCIE, SBIE, SFIE: Bits in LINCR register
TIOSEL: Bit in TRAIOC register
TE: Bit in U0C1 register
LSTART bit
Hardware LIN
Hardware LIN Block Diagram
LINE bit
SBE bit
RXD0 input
control
circuit
Synch Field
control
circuit
TIOSEL = 0
TIOSEL = 1
Bus collision
detection
circuit
MST bit
Bits BCIE, SBIE,
RXD data
and SFIE
Interrupt
control
circuit
Timer RA output pulse
UART0 transfer clock
UART0 TXD data
UART0 TE bit
underflow signal
Timer RA
Timer RA
UART0
27. Hardware LIN
Page 560 of 715
Timer RA
interrupt