R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 145

MCU 1KB FLASH 32K ROM 36-QFN

R5F213J6CNNP#U0

Manufacturer Part Number
R5F213J6CNNP#U0
Description
MCU 1KB FLASH 32K ROM 36-QFN
Manufacturer
Renesas Electronics America
Series
R8C/3x/3JCr
Datasheet

Specifications of R5F213J6CNNP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
36-WQFN Exposed Pad, 36-HWQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
9.2.8
9.2.9
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0025h
Address 0028h
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the FRA2 register.
Symbol
Symbol
Symbol
Symbol
FRA20 High-speed on-chip oscillator frequency
FRA21
FRA22
CPSR
Bit
Bit
High-Speed On-Chip Oscillator Control Register 2 (FRA2)
Clock Prescaler Reset Flag (CPSRF)
CPSR
b7
b7
0
0
switching bit
Reserved bits
Reserved bits
Clock prescaler reset flag
b6
b6
0
0
Bit Name
Bit Name
b5
b5
0
0
b4
b4
0
0
Set to 0.
Setting this bit to 1 initializes the clock prescaler.
(When read, the content is 0).
b3
b3
0
0
Division selection
These bits select the division ratio for the high-
speed on-chip oscillator clock.
b2 b1 b0
Set to 0.
0 0 0: Divide-by-2 mode
0 0 1: Divide-by-3 mode
0 1 0: Divide-by-4 mode
0 1 1: Divide-by-5 mode
1 0 0: Divide-by-6 mode
1 0 1: Divide-by-7 mode
1 1 0: Divide-by-8 mode
1 1 1: Divide-by-9 mode
FRA22
b2
b2
0
0
Function
FRA21
Function
b1
b1
0
0
9. Clock Generation Circuit
FRA20
b0
b0
0
0
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