R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 239

• Manufacturer Part Number: R5F213J6CNNP#U0
• Description: MCU 1KB FLASH 32K ROM 36-QFN
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/3JCr

Specifications of R5F213J6CNNP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-WQFN Exposed Pad, 36-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
17. Timer RA
Timer RA is an 8-bit timer with an 8-bit prescaler.
17.1
Figure 17.1
Table 17.1
TRAIO pin
TRAIO
TRAO
The prescaler and timer each consist of a reload register and counter. The reload register and counter are allocated
at the same address, and can be accessed when accessing registers TRAPRE and TRA (refer to Tables 17.2 to 17.6
the Specifications of Each Mode).
The count source for timer RA is the operating clock that regulates the timing of timer operations such as counting
and reloading.
Figure 17.1 shows a Timer RA Block Diagram. Table 17.1 lists Pin Configuration of Timer RA.
Timer RA contains the following five operating modes:
• Timer mode:
• Pulse output mode:
• Event counter mode:
• Pulse width measurement mode: The timer measures the pulse width of an external pulse.
• Pulse period measurement mode: The timer measures the pulse period of an external pulse.
TRAO pin
Pin Name
f32
f1
f8
(1)
Overview
Bits TIPF1 to TIPF0
Event input enabled at INT2 level
Bits TCK2 to TCK0
= 01b
= 10b
= 11b
Notes:
fOCO
1. Bits TRAIOSEL0 and TRAIOSEL1 in the TRASR register are used to select which pin is assigned.
2. The POL bit in the INT2IC register is used to select the INT2 level when the event input is enabled.
fC32
Event enabled for “L” period of
fC
f1
f8
f2
Event input always enabled
= 000b
= 001b
= 010b
= 011b
= 100b
= 110b
TRCIOD (timer RC output)
Timer RA Block Diagram
Pin Configuration of Timer RA
Digital
filter
P1_5 or P1_7
P3_7
Bits TIPF1 to TIPF0
Assigned Pin
= other than
= 00b
TOENA bit
000b
Bits TIOGT1 to TIOGT0
(2)
= 00b
= 01b
= 10b
switching
Polarity
The timer counts the internal count source.
The timer counts the internal count source and outputs pulses which invert the
polarity by underflow of the timer.
The timer counts external pulses.
TMOD2 to TMOD0
= other than 010b
TMOD2 to TMOD0 = 001b
TOPCR bit
TCSTF, TSTOP: Bits in TRACR register
TEDGSEL, TOPCR, TOENA, TIPF1, TIPF0, TIOGT1, TIOGT0: Bits in TRAIOC register
TMOD2 to TMOD0, TCK2 to TCK0, TCKCUT: Bits in TRAMR register
TMOD2 to TMOD0
= 010b
Output
I/O
I/O
TCKCUT
TMOD2 to TMOD0
bit
= 011b or 100b
TCSTF
bit
TEDGSEL = 1
TEDGSEL = 0
Function differs according to the mode.
Refer to descriptions of individual modes
for details
TRAPRE register
Count control
register
Reload
(prescaler)
circuit
Counter
Q
Q
Data bus
completion signal
flip-flop
Toggle
Measurement
CLR
register
Reload
TRA register
CK
Counter
(timer)
Function
Write to TRAMR register
Write 1 to TSTOP bit
Underflow signal
Page 208 of 715
Timer RA interrupt
17. Timer RA