R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 125

• Manufacturer Part Number: R5F213J6CNNP#U0
• Description: MCU 1KB FLASH 32K ROM 36-QFN
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/3JCr

Specifications of R5F213J6CNNP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-WQFN Exposed Pad, 36-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
Table 7.28
X: 0 or 1
Notes:
Register
Setting
Value
Bit
1.
2.
3.
4.
Output drive capacity high by setting the DRR07 bit in the DRR0 register to 1.
Pulled up by setting the PU07 bit in the PUR0 register to 1.
N-channel open-drain output by setting the SCKOS bit in the SSMR2 register to 1 (N-channel open-drain output).
N-channel open-drain output by setting the NODC bit in the U2SMR3 register to 1.
PD3_5
PD3
0
1
X
X
X
0
X
0
X
0
X
SSUIICSR ICCR1
IICSEL
Port P3_5/SCL/SSCK/TRCIOD/TRDIOD1/CLK2
0
1
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
ICE
X
X
X
X
X
X
X
X
X
X
0
0
1
0
0
0
0
0
0
Communication
control
output
Communication
SSCK
Modes and I/O
Unit (Refer to
Synchronous
Association
X
X
X
X
X
X
X
X
X
Table 25.4
0
0
0
1
0
0
0
0
0
0
between
Pins .)
Serial
control
SSCK
input
0
X
0
X
X
1
0
0
X
0
X
0
X
0
X
0
X
0
X
TRCIODSEL
X
X
X
X
X
2
0
0
TRCPSR1
Other than
Other than
Other than
Other than
010b
010b
010b
010b
X
X
X
X
X
1
1
1
X
X
X
X
X
0
0
0
Other than
Other than
Other than
Other than
TRDPSR1
TRDIOD1
1
X
X
X
1
1
X
X
SEL
10b
10b
10b
10b
X
X
X
X
X
0
0
0
Other than
Other than
Other than
Other than
Other than
Other than
CLK2SEL
U2SR1
X
X
X
1
0
0
01b
01b
01b
01b
01b
01b
0
X
X
X
1
1
X X X
X X X
X X X
X X X
X X X
X X X
X X X
X X X
X X X
X X X
2 1 0
0 0 1
SMD
U2MR
CKDIR
X
X
X
X
X
X
X
X
X
1
0
TRCIOD Pin
TRCIOD Pin
Pin Setting
Pin Setting
Table 7.41
Table 7.41
Table 7.49
Table 7.49
TRDIOD1
TRDIOD1
Timer RC
Refer to
Refer to
Refer to
Refer to
Setting
Setting
Setting
—
X
X
X
X
X
X
X
Input port
Output port
SCL input/output
SSCK input
SSCK output
TRCIOD input
TRCIOD output
TRDIOD1 input
TRDIOD1 output
CLK2 input
CLK2 output
Page 94 of 715
Function
7. I/O Ports
(1)
(2)
(2)
(1)
(2, 4)
(2, 3)
(1)
(2)
(1)
(2)
(2)