R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 337

• Manufacturer Part Number: R5F213J6CNNP#U0
• Description: MCU 1KB FLASH 32K ROM 36-QFN
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/3JCr

Specifications of R5F213J6CNNP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-WQFN Exposed Pad, 36-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
20.3.3
20.3.4
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0137h
Address 0138h
Set the TRDSTR register using the MOV instruction (do not use the bit handling instruction). Refer to 20.10.1
TRDSTR Register of Notes on Timer RD.
Symbol
Symbol
TSTART0 TRD0 count start flag
TSTART1 TRD1 count start flag
Symbol
Bit
Symbol
Bit
SYNC
CSEL1
BFC0
BFD0
BFC1
BFD1
CSEL0
Timer RD Start Register (TRDSTR) in Input Capture Function
Timer RD Mode Register (TRDMR) in Input Capture Function
—
—
—
—
—
—
—
BFD1
b7
b7
—
1
0
Timer RD synchronous bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 1.
TRDGRC0 register function select bit
TRDGRD0 register function select bit
TRDGRC1 register function select bit
TRDGRD1 register function select bit
TRD0 count operation select bit
TRD1 count operation select bit
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
BFC1
b6
b6
—
1
0
Bit Name
Bit Name
BFD0
b5
—
b5
1
0
BFC0
b4
b4
—
1
0
CSEL1
0: Count stops
1: Count starts
Set to 1 in the input capture function.
b3
b3
—
0: Registers TRD0 and TRD1 operate
1: Registers TRD0 and TRD1 operate
0: General register
1: Buffer register of TRDGRA0 register
0: General register
1: Buffer register of TRDGRB0 register
0: General register
1: Buffer register of TRDGRA1 register
0: General register
1: Buffer register of TRDGRB1 register
1
1
independently
synchronously
CSEL0 TSTART1 TSTART0
b2
b2
—
1
1
Function
Function
b1
b1
—
0
1
SYNC
b0
b0
0
0
Page 306 of 715
20. Timer RD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—