R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 83

MCU 1KB FLASH 32K ROM 36-QFN

R5F213J6CNNP#U0

Manufacturer Part Number
R5F213J6CNNP#U0
Description
MCU 1KB FLASH 32K ROM 36-QFN
Manufacturer
Renesas Electronics America
Series
R8C/3x/3JCr
Datasheet

Specifications of R5F213J6CNNP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
36-WQFN Exposed Pad, 36-HWQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
6.5
Table 6.2
Notes:
Table 6.2 lists the Procedure for Setting Bits Associated with Voltage Monitor 1 Interrupt. Figure 6.6 shows an
Operating Example of Voltage Monitor 1 Interrupt.
To use the voltage monitor 1 interrupt to exit stop mode, set the VW1C1 bit in the VW1C register to 1 (digital filter
disabled).
12
Step
5
7
1. When the VW1C0 bit is set to 0, steps 4 and 5 can be executed simultaneously (with one instruction).
2. When the VW1C0 bit is set to 0, steps 6 and 7 can be executed simultaneously (with one instruction).
3. When the voltage detection 1 circuit is enabled while the voltage monitor 1 interrupt is disabled, low
10
11
1
2
3
4
6
8
9
(2)
(1)
(3)
voltage is detected and the VW1C2 bit becomes 1.
When low voltage is detected after the voltage detection 1 circuit is enabled until an interrupt is
enabled for the setting procedure of bits associated with voltage monitor 1 interrupt, an interrupt is
not generated. After an interrupt is enabled, read the VW1C2 bit. When the bit is read as 1, perform
the process that occurs when low voltage is detected.
Voltage Monitor 1 Interrupt
Select the voltage detection 1 detection voltage by bits VD1S3 to VD1S0 in the VD1LS
register.
Set the VCA26 bit in the VCA2 register to 1 (voltage detection 1 circuit enabled).
Wait for td(E-A).
Set the COMPSEL bit in the CMPA register to 1.
Select the interrupt type by the IRQ1SEL in the CMPA register.
Select the sampling clock of the digital filter by
bits VW1F0 and VW1F1 in the VW1C register.
Set the VW1C1 bit in the VW1C register to 0
(digital filter enabled).
Select the interrupt request timing by the VCAC1 bit in the VCAC register and the VW1C7 bit
in the VW1C register.
Set the VW1C2 bit in the VW1C register to 0.
Set the CM14 bit in the CM1 register to 0
(low-speed on-chip oscillator on)
Wait for 2 cycles of the sampling clock of
the digital filter
Set the VW1C0 bit in the VW1C register to 1 (voltage monitor 1 interrupt enabled)
Procedure for Setting Bits Associated with Voltage Monitor 1 Interrupt
When Using Digital Filter
Set the VW1C1 bit in the VW1C register to 1
(digital filter disabled).
− (No wait time required)
When Using No Digital Filter
6. Voltage Detection Circuit
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