R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 360

• Manufacturer Part Number: R5F213J6CNNP#U0
• Description: MCU 1KB FLASH 32K ROM 36-QFN
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/3JCr

Specifications of R5F213J6CNNP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-WQFN Exposed Pad, 36-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
20.4.13 Timer RD I/O Control Register Ci (TRDIORCi) (i = 0 or 1) in Output
Notes:
1. To select 1 (the TRDGRCi register is used as a buffer register of the TRDGRAi register) for this bit by the BFCi
2. To select 1 (the TRDGRDi register is used as a buffer register of the TRDGRBi register) for this bit by the BFDi
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0142h (TRDIORC0), 0152h (TRDIORC1)
bit in the TRDMR register, set the IOC2 bit in the TRDIORCi register to the same value as the IOA2 bit in the
TRDIORAi register.
bit in the TRDMR register, set the IOD2 bit in the TRDIORCi register to the same value as the IOB2 bit in the
TRDIORAi register.
Symbol
Symbol
Bit
IOC0
IOC1
IOC2
IOC3
IOD0
IOD1
IOD2
IOD3
Compare Function
IOD3
b7
1
TRDGRC control bit
TRDGRC mode select bit
TRDGRC register function select bit 0: TRDIOA output register
TRDGRD control bit
TRDGRD mode select bit
TRDGRD register function select bit 0: TRDIOB output register
IOD2
b6
0
Bit Name
IOD1
b5
0
(1)
(2)
IOD0
b4
0
b1 b0
Set to 0 (output compare) in the output compare
function.
1: General register or buffer register
b5 b4
Set to 0 (output compare) in the output compare
function.
1: General register or buffer register
0 0: Disable pin output by compare match
0 1: “L” output by compare match with the
1 0: “H” output by compare match with the
1 1: Toggle output by compare match with the
0 0: Disable pin output by compare match
0 1: “L” output by compare match with the
1 0: “H” output by compare match with the
1 1: Toggle output by compare match with the
IOC3
(Refer to 20.4.21 Changing Output Pins in
Registers TRDGRCi (i = 0 or 1) and TRDGRDi.)
(Refer to 20.4.21 Changing Output Pins in
Registers TRDGRCi (i = 0 or 1) and TRDGRDi.)
b3
1
TRDGRCi register
TRDGRCi register
TRDGRCi register
TRDGRDi register
TRDGRDi register
TRDGRDi register
IOC2
b2
0
Function
IOC1
b1
0
IOC0
b0
0
Page 329 of 715
20. Timer RD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W