R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 88

• Manufacturer Part Number: R5F213J6CNNP#U0
• Description: MCU 1KB FLASH 32K ROM 36-QFN
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/3JCr

Specifications of R5F213J6CNNP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-WQFN Exposed Pad, 36-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
7.1
7.2
7.3
Table 7.2
i = 0 to 4, 6, j = 0 to 7
Note:
Table 7.3
Read
Write
Input
Output
I/O of Peripheral Function
Operation When
The PDi_j (j = 0 to 7) bit in the PDi (i = 0 to 4, 6) register controls I/O of the ports P0_1 to P0_4, P0_6, P0_7, P1,
P2_0 to P2_5, P3_1, P3_3 to P3_5, P3_7, P4_3 to P4_7, and P6_6. The Pi register consists of a port latch to hold
output data and a circuit to read pin states.
Figures 7.1 to 7.12 show the Configurations of I/O Ports. Table 7.2 lists the Functions of I/O Ports.
I/O ports function as I/O ports for peripheral functions (Refer to Table 1.4 Pin Name Information by Pin
Number (1) and Table 1.5 Pin Name Information by Pin Number (2)).
Table 7.3 lists the Setting of PDi_j Bit when Functioning as I/O Ports for Peripheral Functions (i = 0 to 4, 6, j = 0 to
7).
Refer to the description of each function for information on how to set peripheral functions.
Figure 7.13 shows the Configuration of I/O Pins.
1. Nothing is assigned to bits PD4_0 to PD4_2. Also, bits PD0_0, PD0_5, PD2_6, PD2_7, PD6_0 to
Pi Register
Accessing
PD6_5, and PD6_7 are reserved bits.
Functions of I/O Ports
Effect on Peripheral Functions
Pins Other than I/O Ports
Functions of I/O Ports
(i = 0 to 4, 6, j = 0 to 7)
Setting of PDi_j Bit when Functioning as I/O Ports for Peripheral Functions
Read the pin input level.
Write to the port latch.
When PDi_j Bit is Set to 0 (Input Mode)
Set this bit to 0 (input mode).
This bit can be set to either 0 or 1 (output regardless of the port setting).
Value of PDi_j Bit in PDi Register
PDi_j Bit Settings for Shared Pin Function
Read the port latch.
Write to the port latch. The value written to
the port latch is output from the pin.
When PDi_j Bit is Set to 1 (Output Mode)
(1)
Page 57 of 715
7. I/O Ports