R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 113

• Manufacturer Part Number: R5F213J6CNNP#U0
• Description: MCU 1KB FLASH 32K ROM 36-QFN
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/3JCr

Specifications of R5F213J6CNNP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-WQFN Exposed Pad, 36-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
7.4.21
Note:
1. Both “H” and “L” output are set to high drive capacity.
DRR10 Bit (P4_3 drive capacity)
DRR11 Bit (P4_4 to P4_7 drive capacity)
DRR15 Bit (P6_6 drive capacity)
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 01F3h
For pins used as output, the setting values in the DRR1 register are valid.
The DRR10 bit selects whether the drive capacity of the P4_3 output transistor is set to low or high. This bit is
used to select whether the drive capacity of the output transistor is set to low or high for one pin.
The DRR11 bit selects whether the drive capacity of the P4_4 to P4_7 output transistors is set to low or high.
This bit is used to select whether the drive capacity of the output transistors is set to low or high for four pins.
The DRR15 bit selects whether the drive capacity of the P6_6 output transistor is set to low or high. This bit is
used to select whether the drive capacity of the output transistors is set to low or high for one pin.
Symbol
Symbol
DRR10 P4_3 drive capacity
DRR11 P4_4 to P4_7 drive capacity
DRR15 P6_6 drive capacity
Bit
Drive Capacity Control Register 1 (DRR1)
—
—
—
—
—
b7
—
0
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Reserved bits
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
b6
—
0
Bit Name
DRR15
b5
0
b4
—
0
0: Low
1: High
Set to 0.
0: Low
1: High
b3
—
0
(1)
(1)
b2
—
0
DRR11
Function
b1
0
DRR10
b0
0
Page 82 of 715
7. I/O Ports
R/W
R/W
R/W
R/W
R/W
—
—